Clear, consistent terminology is essential for effective communication among design engineers, PCB fabricators, component manufacturers, assembly technicians, and end-users.
Design, Manufacturing, Testing & Verification, Materials, ECAD-MCAD Integration, Standards & Compliance, Components & Packaging
Acid Trap: An acute angle in traces that can cause etching issues during PCB manufacturing, where etchant can accumulate and potentially over-etch the trace, leading to open circuits. Generally, trace angles less than 90° should be avoided.
Additive Manufacturing (for PCBs): A fabrication method that builds PCB structures by adding material rather than removing it. Includes 3D-printed electronics (e.g., Nano Dimension DragonFly) and inkjet-printed circuits, enabling complex geometries not possible with traditional methods. Applications include rapid prototyping, custom electronics, and specialized designs like conformal circuits.
Advanced Packaging: Next-generation IC packaging technologies that enable higher integration densities, improved performance, and smaller form factors. Includes techniques such as 2.5D/3D integration, fan-out wafer-level packaging (FOWLP), and system-in-package (SiP).
Allegro: A comprehensive PCB design software suite from Cadence Design Systems, widely used for complex, high-speed, and high-density designs. Features include constraint-driven design, advanced routing capabilities, and signal integrity analysis.
Altium Designer: A popular and comprehensive ECAD software suite for schematic capture, PCB layout, and FPGA design, known for its integrated 3D visualization capabilities. It offers a unified platform connecting schematic capture, PCB layout, library management, and manufacturing outputs.
Annular Ring: The ring of copper surrounding a plated through-hole in a PCB. Its width is critical for reliable solder joints and connectivity. Insufficient annular rings can lead to breakout during drilling or reduced reliability.
AOI (Automated Optical Inspection): An automated visual inspection of a PCB (bare board or assembled) for defects such as missing components, incorrect polarity, solder bridges, or open circuits, using cameras and pattern recognition software. AOI systems can detect up to 90% of common PCB manufacturing defects.
Aperture: In Gerber files, an aperture defines the shape and size of an element (like a pad or trace segment) to be exposed on a layer of the PCB. Common aperture shapes include circle, rectangle, and obround.
Array (Panel / Panelization): Multiple PCBs arranged on a larger board (panel) for efficient manufacturing and assembly. They are typically separated later by V-scoring, routing, or breakaway tabs. Panelization improves throughput and can reduce costs by up to 30-50% compared to individual boards.
ASIC (Application-Specific Integrated Circuit): An integrated circuit customized for a specific use rather than for general-purpose applications, optimized for particular functions or performance requirements. ASICs offer higher performance, lower power consumption, and smaller size compared to off-the-shelf components, but with higher development costs.
Artwork: The photoplotted film or digital data representing the pattern of conductive and non-conductive areas on each layer of a PCB, used in the manufacturing process.
Aspect Ratio: For a drilled hole in a PCB, it's the ratio of the board thickness to the diameter of the drilled hole. High aspect ratios (typically >10:1) can be challenging to plate reliably and may require special manufacturing techniques.
Assembly Drawing: A drawing that specifies how components are to be mounted on the PCB, including their locations, orientations, and any special instructions. Assembly drawings are essential documentation for PCB manufacturing and quality control.
Autorouter: An ECAD software feature that automatically routes (connects) the electrical nets on a PCB layout based on predefined rules and constraints. While convenient, manual routing typically achieves better results for critical signals. Modern autorouters can achieve 80-95% completion rates on complex boards, but often require manual refinement for high-speed signals.
Back Annotation: The process of transferring changes from the PCB layout back to the schematic, ensuring both remain synchronized. This maintains design integrity by updating component references, pin swaps, or connectivity modifications.
Backdrill: Removal of unused via portions to improve signal integrity in high-speed designs by eliminating "stubs" that can cause signal reflections. Particularly important for backplanes and boards operating above 5 Gbps.
Ball Grid Array (BGA): A type of surface-mount package for integrated circuits where connections are made via an array of solder balls on the underside of the package. BGAs allow for higher pin counts in smaller areas but require special considerations for routing and inspection.
Bare Board: A PCB that has been fabricated (etched, drilled, plated) but has no electronic components mounted on it yet.
Bathtub Curve: A reliability engineering term depicting failure rates over a product's lifecycle, where failure rates are high at the beginning (early failures), low during normal operation, and high again as components wear out. Used for predicting electronic component and PCB reliability.
Bill of Materials (BOM): A comprehensive list of all components, raw materials, sub-assemblies, and quantities required to manufacture or assemble a product, including a PCB. Typically includes part numbers, suppliers, and specifications. Essential for procurement, assembly, and documentation.
BOM Scrubbing: The process of reviewing, analyzing, and optimizing a bill of materials to ensure component availability, identify obsolete parts, verify pricing, and find alternatives if needed. Helps prevent manufacturing delays and reduce costs.
Black Pad: A nickel corrosion defect in ENIG finish that can lead to solder joint failures, appearing as dark areas under solder joints and causing poor adhesion. Often detected through cross-sectional analysis.
Blind Via: A via that connects an outer layer of a PCB to one or more inner layers, but does not go all the way through the board. Used in high-density interconnect (HDI) designs to increase routing density.
Board Outline: The physical perimeter or shape of the PCB, defining its mechanical dimensions and form factor.
Board Profile: A side view showing the thickness profile of a PCB, including information about overall thickness and material layers.
Bottom Layer: The lowermost layer of a PCB, often used for additional routing or as a ground plane.
Bow and Twist: Measurements of PCB deformation from flatness, where bow is the deviation from planarity along the diagonal of a rectangular board, and twist is the deviation of one corner when the other three corners are in a plane. IPC standards typically specify maximum allowable values.
Breakaway Tab: A removable connection between a PCB and the manufacturing panel, designed to be easily separated after assembly. Also known as mouse bites or tab routing.
Breakout: The initial routing of traces from dense component pins, particularly BGA packages, typically requiring careful planning and often using fanout vias.
Buried Via: A via that connects two or more inner layers of a PCB but does not extend to an outer layer. Used in multilayer designs to increase routing density without consuming space on outer layers.
Burnout: Thermal damage to a PCB or component due to excessive current or heat, often appearing as charred areas or delamination.
CAD (Computer-Aided Design): The use of computer systems to aid in the creation, modification, analysis, or optimization of a design.
CAD to CAM Transfer: The process of providing design files to a manufacturer for production, typically including Gerber files, drill files, netlists, and assembly data.
CAF (Conductive Anodic Filament): A failure mechanism in PCBs where conductive filaments grow between conductors along glass fibers in the substrate, potentially causing shorts. Often associated with high voltage, humidity, and contamination.
CAM (Computer-Aided Manufacturing): The use of software and computer-controlled machinery to automate a manufacturing process. In PCB context, this often refers to generating manufacturing data (e.g., Gerber files, drill files).
Castellations: Half-holes on the edge of a PCB that allow for edge connections to another board. Commonly used in modular designs where one PCB mounts to another.
Centroid File (Pick and Place File / XY File): A file that specifies the X-Y coordinates and rotation of the center point (centroid) of each surface-mount component on a PCB, used by automated pick-and-place assembly machines.
Chamfer: A beveled PCB corner, typically used to aid in insertion into enclosures or connectors, or to meet mechanical requirements.
Chip-on-Board (COB): A technique where bare integrated circuit chips are directly mounted onto and wire bonded to the PCB, eliminating the need for packaging and reducing size.
Clearance: The minimum distance between two conductive elements (e.g., traces, pads, planes) on a PCB, maintained to prevent short circuits or arcing. Clearance requirements increase with voltage.
Cold Solder Joint: A defective solder connection that didn't reach proper temperature during soldering, resulting in a weak, unreliable joint. Typically appears dull or grainy rather than smooth and shiny.
Collision Detection: In ECAD-MCAD integration, the process of identifying and resolving physical interferences between PCB components and mechanical enclosures or other assemblies. Critical for ensuring proper fit and preventing design conflicts.
Component: An individual electronic part, such as a resistor, capacitor, integrated circuit, or connector, that is mounted on a PCB.
Component Library: A database within ECAD software containing schematic symbols, PCB footprints, and often 3D models for various electronic components.
Component Side (Top Side): The side of the PCB where most components are typically mounted.
Conformal Coating: A protective non-conductive chemical coating applied to electronic assemblies to protect against moisture, dust, and chemical contaminants, particularly important in harsh environments. Common types include acrylic, silicone, polyurethane, and parylene.
Controlled Collapse Chip Connection (C4): A flip chip technology used for connecting chips to substrates using controlled solder bump heights.
Controlled Dielectric: A PCB material with specific dielectric properties for signal integrity, carefully controlled during manufacturing to maintain consistent impedance.
Controlled Impedance: A trace design technique to maintain specific electrical impedance characteristics, critical for high-speed signal integrity. Requires precise control of trace width, thickness, distance from reference planes, and dielectric properties.
Copper Clad Laminate (CCL): The base material for PCBs, consisting of an insulating substrate (e.g., FR-4) with a thin layer of copper bonded to one or both sides.
Copper Defined Pad: A pad on a PCB where the copper area defines the soldering area, as opposed to a solder mask defined pad.
Copper Pour (Polygon Pour / Copper Fill): A large area of copper on a PCB layer, typically connected to a power or ground net, used for shielding, heat dissipation, or providing a low-impedance path.
Copper Weight: The thickness of copper on a PCB, typically measured in ounces per square foot. Common values are 1 oz (~35 μm), 2 oz (~70 μm), and 0.5 oz (~17.5 μm).
Core (PCB Core): A rigid piece of dielectric material with copper foil bonded to one or both sides, forming the central structure of a multilayer PCB.
Counterbore: A recessed hole in a PCB with a larger diameter at the top than at the bottom, often used for mounting hardware.
Countersink: A tapered hole in a PCB used to accommodate flush-mounted hardware such as flathead screws.
Creepage: The shortest path between two conductors measured along the surface of the insulation. Critical for high-voltage designs and safety compliance.
Cross-probing: A feature in ECAD software that allows synchronization between the schematic and PCB layout views, enabling designers to select components in one view and see them highlighted in the other.
Cross-section Analysis: Physical examination of PCB layers through cutting and polishing to inspect internal structures, used for quality control and failure analysis.
Crosstalk: Undesired signal coupling between adjacent traces or nets, which can cause interference and signal integrity issues. Increases with frequency and proximity.
CTE (Coefficient of Thermal Expansion): A measure of how a material expands or contracts with temperature changes. Mismatched CTEs between different materials in a PCB can lead to stress and reliability issues.
Current Density: The amount of electrical current flowing per unit area in a conductor, measured in amperes per square millimeter. Excessive current density can lead to overheating and failure.
Current Return Path: The path that current takes to return to its source, ideally through a ground plane or dedicated return trace. Critical for signal integrity—improper return paths cause noise and EMI.
Data Matrix Code: A 2D barcode often printed on PCBs for traceability, containing information like serial numbers, batch codes, or part numbers.
DDR (Double Data Rate): A memory interface specification that transfers data on both the rising and falling edges of the clock signal, effectively doubling the data rate without increasing the clock frequency.
Decoupling Capacitor: A capacitor placed close to power pins of ICs to filter out high-frequency noise and provide local energy storage, stabilizing the power supply during rapid current demands.
Delay: The time it takes for a signal to propagate from one point to another in a circuit. Critical for high-speed designs with timing constraints.
Delamination: Separation of PCB layers due to manufacturing defects, thermal stress, or moisture ingress. Appears as bubbles or blisters and compromises both mechanical and electrical integrity.
Design for Assembly (DFA): A design philosophy focused on optimizing a product's design for ease of assembly, aiming to reduce assembly time and cost by considering component placement, orientation, and accessibility.
Design for Excellence (DFX): A comprehensive design approach that encompasses DFM, DFA, DFT, and other design considerations to optimize the complete product lifecycle.
Design for Manufacturability (DFM): A design philosophy focused on creating products that are easy and cost-effective to manufacture, considering the capabilities and limitations of manufacturing processes.
Design for Reliability (DFR): A systematic approach to designing products that will perform their intended function reliably over their expected lifetime. Involves analyzing potential failure modes, stress testing, and design optimization to enhance long-term performance.
Design for Testing (DFT): Design techniques that make it easier to test a PCB after manufacturing, including the addition of test points, boundary scan capabilities, and other testability features.
Design Guidelines: Manufacturing constraints that guide PCB design to ensure manufacturability, typically provided by fabricators and specifying minimum trace widths, clearances, hole sizes, etc.
Design Reviews: Formal evaluation process to identify and correct design issues before production, involving stakeholders from design, manufacturing, and quality assurance.
Design Rule Check (DRC): An automated process in ECAD software that checks if the PCB layout adheres to the predefined design rules, flagging violations such as clearance issues, width constraints, or manufacturing limitations.
Design Rule Manual (DRM): A document provided by a PCB manufacturer that details their specific capabilities, limitations, and requirements for PCB design. Includes information on minimum trace widths, clearances, hole sizes, layer counts, and other manufacturing parameters.
Design Rules: A set of constraints and guidelines specified in ECAD software (e.g., minimum trace width, clearance, via size) to ensure the PCB can be reliably manufactured and will function correctly.
Design Verification: The process of validating a PCB design against requirements and specifications, often including electrical, thermal, and mechanical analyses.
Device Tree: Hierarchical description of hardware components and their relationships, commonly used in embedded systems to describe hardware configuration.
Df (Dissipation Factor): A measure of the energy losses in a dielectric material. Lower values indicate less signal loss and are preferred for high-frequency applications. For example, FR-4 typically has a Df of 0.02 at 1 MHz, while Rogers RO4350B has a Df of 0.0037 at 10 GHz.
Differential Pair: Two parallel traces routed closely together, carrying equal and opposite signals (e.g., USB, HDMI). Improves noise immunity by canceling interference and requires matched length and spacing for optimal performance.
Die: The semiconductor chip itself, before packaging. The active part of an integrated circuit cut from a silicon wafer.
Dielectric: Insulating material between conductive layers in a PCB, such as FR-4, polyimide, or ceramic. The properties of this material significantly affect signal propagation.
Dielectric Constant (Dk): A property of insulating materials that affects signal propagation speed and impedance. Lower values generally provide better high-frequency performance. FR-4 typically has a Dk of 4.0-4.5, while high-frequency materials like Rogers RO4350B have a Dk of approximately 3.48.
DIP (Dual In-line Package): A rectangular electronic component package with pins along both long sides, traditionally used for through-hole mounting of integrated circuits.
DOEs (Design of Experiments): Systematic method for determining the relationship between factors affecting a process and the output of that process, used to optimize design and manufacturing parameters.
Dogbone: A connection pattern used for BGA packages, where a short trace connects a via to a pad, resembling the shape of a dogbone. Used when direct via-in-pad is not feasible.
Drill File (NC Drill File / Excellon File): A data file that specifies the X-Y coordinates, sizes, and types of all holes to be drilled in a PCB, following the Excellon format standard.
Dry Film Solder Mask: A type of solder mask applied as a laminated film, as opposed to a liquid photoimageable (LPI) solder mask. Offers better thickness control but less commonly used than LPI.
DSN File: Design file format used for PCB routing, particularly with Specctra or similar autorouting tools.
DXF/DWG (Drawing Exchange Format): Standard file formats used for exchanging 2D mechanical design data between CAD systems. Often used in ECAD-MCAD integration for transferring board outlines, mounting holes, and mechanical features.
E-CAM (Electronics Computer-Aided Manufacturing): Software specifically for PCB manufacturing processes, converting design data into machine instructions for fabrication equipment.
Eagle: A PCB design software, now owned by Autodesk, popular among hobbyists and small businesses for its relative simplicity and lower cost.
ECAD (Electronic Computer-Aided Design): Software tools specifically used for designing electronic systems, including schematic capture, simulation, and PCB layout.
ECAD-MCAD Integration: The collaboration between electronic and mechanical design systems, allowing data exchange and co-design of electronic and mechanical components, crucial for ensuring proper fit, thermal management, and interference prevention. Modern ECAD-MCAD workflows enable concurrent engineering between electrical and mechanical teams.
ECM (Electrochemical Migration): A process where metal ions migrate under an electric field in the presence of moisture, potentially causing shorts. Common with silver, tin, and lead under humid conditions.
ECN (Engineering Change Notice): A document that specifies and authorizes a change to a design after initial release, detailing the modification, reason, and affected documentation.
ECO (Engineering Change Order): A formal document specifying a change to an existing design, often implemented after initial release, including scope, justification, and implementation plan.
EDA (Electronic Design Automation): Software tools for designing and producing electronic systems, often used interchangeably with ECAD but sometimes encompassing a broader range of tools including simulation and verification.
Edge Connector: A connector formed by etching conductive pads along one edge of a PCB, designed to mate with a corresponding socket. Common in expansion cards, memory modules, and daughterboards.
Edge Plating: Copper plating applied to the edges of a PCB, providing electrical connectivity or shielding around the perimeter.
Electrical Rule Check (ERC): An automated process in schematic capture software that checks for logical errors in the circuit design, such as unconnected pins or conflicting net assignments.
Electromagnetic Compatibility (EMC): The ability of an electronic device to function properly in its electromagnetic environment without introducing intolerable electromagnetic disturbances to other devices in that environment.
Electromagnetic Interference (EMI): Undesired electromagnetic energy that disrupts the proper functioning of electronic devices, either radiated through space or conducted along power or signal lines.
EMI Shielding: Techniques to block or reduce electromagnetic interference using conductive materials to reflect, absorb, or redirect electromagnetic radiation. Common methods include shielding cans, conductive gaskets, and ground planes.
ELIC (Every Layer Interconnect): A PCB technology that allows connections between any layers in a multilayer PCB, offering maximum routing flexibility but at higher manufacturing cost.
Embedded Components: Electronic components (resistors, capacitors, or even active devices) that are embedded within the PCB layers rather than mounted on the surface, reducing size and improving performance. Enables higher component density and improved reliability.
Enclosure Design: In ECAD-MCAD integration, the process of designing the mechanical housing that will contain the PCB, considering factors like mounting points, thermal management, and connector accessibility.
ENIG (Electroless Nickel Immersion Gold): A popular surface finish for PCBs, providing a flat, solderable surface with good corrosion resistance. Consists of a nickel layer plated over copper, followed by a thin gold coating.
ERC (Electrical Rule Check): Automated verification of a schematic for electrical design errors, such as floating inputs, unconnected outputs, or power conflicts.
ESD (Electrostatic Discharge): The sudden flow of electricity between two electrically charged objects caused by contact or an electrical short, which can damage sensitive electronic components.
Etch Factor: The ratio of etched depth to undercut in the PCB manufacturing process. Affects the final trace geometry and must be considered for precise impedance control.
Etching: The chemical process of removing unwanted copper from a copper-clad laminate to form the desired conductive pattern (traces, pads) on a PCB.
Eye Diagram: A signal quality visualization tool used in high-speed design to show signal integrity. Represents the superimposed view of a signal as it would appear on an oscilloscope, with "open eyes" indicating good quality.
Fabrication (PCB Fabrication): The complete process of manufacturing a bare PCB, from raw materials to the finished board ready for component assembly, including imaging, etching, drilling, plating, and finishing.
Fabrication Drawing: A detailed drawing that provides all the necessary information for a manufacturer to produce the bare PCB, including dimensions, layer stack-up, materials, drill details, and surface finish.
Fall Time: The time it takes for a signal to transition from high to low, typically measured from 90% to 10% of the signal's amplitude. Critical for timing calculations in digital circuits.
Fanout: The pattern of traces and vias used to connect to dense component packages, particularly BGA components, creating paths from densely packed pads to less congested areas for routing.
FEXT (Far-End Crosstalk): Unwanted signal coupling measured at the far end of a transmission line (opposite from the signal source). Occurs when signal energy from one trace couples to an adjacent trace and propagates in the same direction as the original signal.
Field Solver: A computational tool for calculating electromagnetic fields, used for impedance and signal integrity analysis based on actual trace geometries and material properties.
Fiducial Mark: Small, precisely located copper features (usually circular or square pads) on a PCB used as reference points by automated assembly and inspection equipment for accurate component placement and alignment.
Finger Contact: Gold-plated edge connector pad used for repeated insertion and removal, designed for durability and low contact resistance.
Flash Gold: A thin layer of gold plating applied to PCB pads, providing corrosion protection and enhancing solderability.
Flex PCB: A flexible printed circuit board made with a bendable substrate (typically polyimide), allowing the circuit to conform to a specific shape or to be dynamically flexed during use.
Flexible Hybrid Electronics (FHE): A technology combining flexible printed circuits with conventional rigid components, enabling bendable or stretchable electronic products for wearables, medical devices, and IoT applications. FHE bridges the gap between traditional rigid electronics and fully printed electronics.
Flying Probe Test (FPT): An automated electrical test method for bare or assembled PCBs where probes "fly" (move) to contact test points and check for shorts, opens, and component values without requiring a dedicated test fixture.
Footprint (Land Pattern): The pattern of pads on a PCB to which a specific component's leads are soldered. The footprint must match the component's physical dimensions and lead configuration.
Forward Annotation: The process of transferring design changes from the schematic to the PCB layout, ensuring consistency between logical and physical representations.
FPGA (Field-Programmable Gate Array): A type of integrated circuit that can be programmed in the field after manufacturing, containing configurable logic blocks and programmable interconnects.
FR-4: A common NEMA grade designation for glass-reinforced epoxy laminate material, widely used as an insulating substrate for PCBs due to its good strength, flame resistance, and electrical properties. Standard FR-4 has a Tg of around 130-140°C, while high-Tg FR-4 can reach 170-180°C.
Functional Testing: A testing procedure that verifies the PCB works according to design specifications by applying power and signals and measuring the outputs under various conditions.
Gerber File: A standard 2D vector image file format used by PCB industry software to describe the images of a printed circuit board (copper layers, solder mask, legend, etc.). It's the de facto standard for PCB manufacturing data, specifically in the RS-274X extended format.
GND (Ground): A common reference point in an electrical circuit from which voltages are measured, often connected to the earth or a chassis. On a PCB, it's typically a large plane or extensive network of traces providing a low-impedance return path.
Gold Finger: An edge connector pad on a PCB plated with gold for reliability and repeated insertion/removal cycles, commonly used in computer expansion cards, memory modules, and other plug-in boards.
Golden Board: A reference PCB used for comparison during quality control and testing, representing the ideal implementation of a design against which production boards are compared.
Ground Bounce: A temporary voltage fluctuation in the ground reference of a digital circuit caused by rapid current changes. Can lead to false triggering and signal integrity issues in high-speed designs.
Ground Plane: A continuous copper area on a PCB layer used as a common ground reference point, providing a low-impedance return path for signals, reducing EMI, and improving signal integrity.
HAL (Hardware Abstraction Layer): A software layer that provides an interface to hardware components, allowing software to interact with hardware in a device-independent manner.
HAL (Hardware-in-the-Loop): A testing method for embedded systems where the actual hardware is connected to a simulation of its environment, allowing real-time testing of the system's behavior under various conditions.
HALT (Highly Accelerated Life Testing): An aggressive reliability testing method that exposes PCBs or electronic systems to extreme environmental conditions (temperature cycling, vibration, etc.) to identify potential failure modes and design weaknesses early in the development cycle.
Hard Gold: Durable gold plating used for electrical contacts that require wear resistance, typically containing hardening elements like cobalt or nickel and used for connectors subject to frequent mating cycles.
HASL (Hot Air Solder Leveling): A common and cost-effective PCB surface finish where the board is dipped in molten solder and then leveled with hot air knives, leaving a coating of solder on exposed copper areas.
HDI (High-Density Interconnect): PCBs with higher wiring density per unit area than conventional PCBs, typically featuring finer lines and spaces, smaller vias (microvias), and higher layer counts. Enables more compact designs for mobile devices and other space-constrained applications.
Heat Sink: A component or structure designed to dissipate heat away from electronic components, typically made of copper, aluminum, or other thermally conductive materials.
HiPot Test (High Potential Test): An electrical safety test that applies a high voltage between isolated sections of a circuit to verify insulation integrity and detect potential breakdown points. Critical for ensuring safety in high-voltage applications.
Hot Swap: The ability to replace components or modules while the system remains powered and operational, requiring special circuit design to prevent damage during insertion and removal.
HSD (High Speed Digital): Design techniques and technologies for handling high-speed digital signals, typically above 1 Gbps, where transmission line effects become significant.
ICT (In-Circuit Testing): An automated electrical test performed after component assembly that checks individual components and circuit pathways on a PCB using a "bed-of-nails" fixture or flying probes.
IDF (Intermediate Data Format): A file format used for exchanging design data between ECAD and MCAD systems, allowing electronic and mechanical designers to collaborate on product development.
Immersion Silver: A PCB surface finish that deposits a thin layer of silver directly on copper surfaces, providing good solderability and moderate shelf life at a reasonable cost.
Immersion Tin: A PCB surface finish that deposits a thin layer of tin directly on copper surfaces, offering good solderability but susceptible to whisker growth in some environments.
Impedance: The effective resistance of an AC circuit arising from the combined effects of ohmic resistance, inductive reactance, and capacitive reactance. Measured in ohms and critical for signal integrity in high-speed designs.
Impedance Calculator: A tool used to determine the appropriate trace width and spacing to achieve a specific impedance, based on material properties and PCB stackup parameters.
Impedance Control: The design and manufacturing practice of creating PCB traces with a specific characteristic impedance, crucial for high-speed digital signals to maintain signal integrity and minimize reflections.
Impedance Discontinuity: A change in impedance along a signal path that can cause reflections and signal integrity issues. Common at vias, layer transitions, and component connections.
Impedance Matching: The practice of designing circuits to make the output impedance of a source equal to the input impedance of a load, maximizing power transfer and minimizing signal reflections. Critical for high-frequency and high-speed applications.
IML (Integrated Molded Layout): A manufacturing process where the PCB is integrated with a molded plastic structure, commonly used in automotive and consumer products to reduce parts and assembly steps.
In-Circuit Test (ICT): An automated electrical test performed after component assembly that checks individual components and circuit pathways on a PCB using a "bed-of-nails" fixture or flying probes.
Insertion Loss: The loss of signal power resulting from the insertion of a device in a transmission line or optical fiber, typically increasing with frequency and limiting the maximum usable length of interconnects.
Integrated Passive Devices: Passive electronic components (resistors, capacitors, inductors) combined into a single package or embedded within the PCB structure, reducing size and improving performance.
Intrinsic Capacitance: The natural capacitance that exists between conductors on a PCB, which can affect signal integrity in high-frequency designs if not properly managed.
Intrinsic Inductance: The natural inductance that exists in conductors on a PCB, causing voltage spikes during current changes and affecting high-speed signals.
IPC (Association Connecting Electronics Industries): A global trade association that develops and publishes standards for the design, manufacturing, and assembly of electronic equipment and PCBs.
IPC-2221: A generic standard for printed board design, providing guidelines for clearances, conductor widths, thermal management, and other design parameters.
IPC-2581: A standard for transferring PCB design data to manufacturing, providing a single data structure containing all board fabrication, assembly, and test data.
IPC-6012: A qualification and performance specification for rigid printed boards, defining the acceptability criteria for PCB fabrication.
IPC-A-600: A standard that provides visual acceptance criteria for PCBs, illustrating acceptable and unacceptable conditions during PCB inspection.
IPC-A-610: A standard that provides acceptance criteria for electronic assemblies, defining quality classes for different end-products and their reliability requirements.
IPC Class: Manufacturing quality levels defined by IPC standards (Class 1, 2, and 3) for electronic assemblies. Class 1 is for general electronics, Class 2 for dedicated service electronics, and Class 3 for high-reliability applications where continued performance is critical.
ISI (Inter-Symbol Interference): A form of signal distortion where one symbol interferes with subsequent symbols, caused by bandwidth limitations and resulting in bit errors in digital communications.
Jitter: Deviation in signal timing from its ideal occurrence, critical in high-speed designs. Can be random (due to noise) or deterministic (pattern-dependent) and affects timing margins in digital systems.
JTAG (Joint Test Action Group): A standardized method for testing and debugging PCBs and programmable devices, defined by IEEE 1149.1. Enables boundary scan testing and in-system programming without physical access to all test points.
Keepout: An area on a PCB where routing is prohibited to maintain clearances or for other design reasons, such as avoiding mechanical interference or high-voltage isolation.
Keepout Area (Mechanical): A region on a PCB where components cannot be placed due to mechanical constraints such as enclosure features, mounting hardware, or cooling components. Critical for ECAD-MCAD integration.
KiCad: An open-source PCB design software suite, offering schematic capture, PCB layout, and 3D visualization capabilities without licensing costs. Popular in academic, hobbyist, and small business environments.
Laminate: The insulating material (e.g., FR-4) that forms the base of a PCB, often composed of layers of woven glass fabric impregnated with epoxy resin.
Land (Pad): A conductive area on a PCB surface to which a component lead or terminal is soldered. Used interchangeably with "pad."
Laser Drilling: A process for creating very small holes (typically microvias) in PCBs using laser technology, enabling higher density interconnects than mechanical drilling. Critical for HDI designs.
Layer (PCB Layer): One of the distinct conductive or non-conductive planes within a PCB's structure (e.g., signal layer, power plane, ground plane, solder mask layer, silkscreen layer).
Layer Stack-up (Stackup): The arrangement and specification of all layers (conductive and dielectric) in a multilayer PCB, including their materials, thicknesses, and order. Critical for impedance control and signal integrity.
Layout (PCB Layout): The process of arranging components and routing traces on a PCB using ECAD software. Also refers to the resulting design, showing the physical implementation of the schematic.
Lead (Component Lead): The metallic terminal or pin on an electronic component that is used to make electrical connections, typically by soldering to a pad on a PCB.
Lead Time: The time required from placing an order to receiving the finished PCB, including design preparation, manufacturing, and shipping.
Legend (Silkscreen): See Silkscreen.
Length Matching: The process of equalizing trace lengths to ensure signals arrive at their destinations at the same time, critical for high-speed interfaces like DDR memory. Often implemented using serpentine trace patterns.
Library Component: A reusable component definition stored in an ECAD library, typically including schematic symbol, PCB footprint, and possibly 3D model and simulation parameters.
LPI (Liquid Photoimageable) Solder Mask: A common type of solder mask applied as a liquid, then exposed to UV light through a photomask and developed to create openings over pads and vias.
LVS (Layout Versus Schematic): A verification process to confirm that the connections in the PCB layout match those in the schematic, ensuring electrical integrity of the design.
Manual Routing: The process of manually drawing conductive traces in ECAD software to connect components on a PCB, as opposed to using an autorouter. Offers greater control over critical signals.
Mask (Solder Mask, Paste Mask): A layer on a PCB that either prevents solder from adhering to certain areas (solder mask) or defines where solder paste should be applied (paste mask/stencil).
Material Selection for Enclosures: The process of choosing appropriate materials for electronic enclosures based on factors such as thermal properties, EMI shielding, mechanical strength, and environmental resistance. Critical in ECAD-MCAD integration.
MCAD (Mechanical Computer-Aided Design): Software tools used for designing mechanical aspects of products, including enclosures, mounting features, and cooling systems that interface with PCBs.
MCM (Multi-Chip Module): A specialized electronic package where multiple integrated circuits are packaged onto a unifying substrate, allowing for higher integration density than discrete packaging.
Mechanical Drilling: The traditional method of creating holes in PCBs using drill bits, as opposed to laser drilling. Limited in minimum hole size and aspect ratio compared to laser drilling.
Mechanical Layers: Non-electrical layers in ECAD software used to communicate mechanical information such as board outlines, mounting holes, keepout areas, and dimensional constraints. Essential for ECAD-MCAD collaboration.
Mechanical Stress Analysis: In ECAD-MCAD integration, the simulation of physical stresses on a PCB due to mounting, thermal expansion, vibration, or impact, helping to prevent mechanical failures.
Microstrip: A transmission line design where the signal trace is on an outer layer above a ground plane, separated by a dielectric material. Commonly used for RF and high-speed digital signals.
Microvia: A very small via (typically ≤ 0.15mm or 6 mils in diameter), often laser-drilled, used in HDI PCBs to connect adjacent layers. Enables higher routing density than conventional vias.
Minimum Electrical Test Spacing: The minimum spacing between conductors required for reliable electrical testing, ensuring test probes can access test points without causing shorts.
Mixed-Signal PCB: A PCB that incorporates both analog and digital circuitry, requiring careful partitioning and isolation to prevent interference between different signal types.
Mounting Hole: A hole in a PCB used for mechanically securing the board to a chassis or enclosure, often non-plated and reinforced with additional copper for durability.
Mouse Bites: Perforated edges on a PCB that allow for easy separation from a panel, consisting of a series of small drilled holes that create a weakened break line.
MTBF (Mean Time Between Failures): A reliability measure that represents the average time between system failures, used for estimating product lifetime and maintenance requirements.
MTTF (Mean Time To Failure): A reliability measure that represents the average time until a component or system fails, typically used for non-repairable components.
Multilayer PCB: A PCB composed of three or more conductive layers separated by insulating (dielectric) layers, allowing for more complex and dense circuitry than single or double-sided boards.
NC Drill File (Excellon File): See Drill File.
Neck-down: A reduction in trace width, often used to connect to smaller pads or navigate through congested areas while maintaining adequate current capacity in wider sections.
Net: A collection of component pins (nodes) that are electrically connected together in a circuit, represented by wires in the schematic and traces in the PCB layout.
Net Tie: A special PCB element that connects two nets that are at the same electrical potential, used for design organization or to manage splitting and joining of planes.
Netlist: A list of all electrical connections (nets) in a circuit design, typically generated from the schematic and used as input for PCB layout and simulation. Essentially the "blueprint" connecting components.
NEXT (Near-End Crosstalk): Unwanted signal coupling measured at the same end of the transmission line as the signal source. Occurs when signal energy from one trace couples to an adjacent trace.
Nodal Analysis: A circuit analysis technique based on applying Kirchhoff's current law at each node to solve for unknown voltages. Used in simulation tools like SPICE.
Node: A point in a circuit where two or more component terminals are connected. In PCB design, nodes are represented as nets.
Negative Etching: A PCB manufacturing process where copper is removed through chemical etching in areas not protected by resist.
NPL (Non-Preferred Layer): A layer on a PCB that should be avoided for routing when possible, typically due to manufacturing or signal integrity concerns. Often specified when certain layers are optimized for specific signal types.
NPTH (Non-Plated Through Hole): A hole in a PCB that does not have conductive plating on its walls, typically used for mounting purposes or mechanical alignment.
ODB++: An intelligent, single-file data format for PCB manufacturing, assembly, and test, offering more comprehensive information than traditional Gerber files. Developed by Valor Computerized Systems (later acquired by Mentor Graphics) as an alternative to Gerber format.
Open Circuit (Open): An unintended break in a conductive path, preventing current flow. A common defect in PCB manufacturing and assembly.
OrCAD: Schematic and PCB design software by Cadence, widely used for circuit design, simulation, and board layout in various industries.
OSP (Organic Solderability Preservative): A thin, organic coating applied to copper pads on a PCB to protect them from oxidation and maintain solderability before assembly. Environmentally friendly but with limited shelf life.
Overetch: Excessive removal of copper during the etching process, resulting in traces that are thinner than designed and potentially causing open circuits or increased resistance.
Overshoot/Undershoot: When a signal exceeds its target voltage level (overshoot) or falls below it (undershoot), often due to transmission line effects. Can cause false triggering or damage to components if severe.
Pad (Land): A conductive area on a PCB surface to which a component lead or terminal is soldered. Provides both electrical connection and mechanical attachment.
PADS: PCB design software, now part of Mentor Graphics (Siemens) portfolio, known for its ease of use and integration with other design tools.
Package: The physical form of an electronic component, including its body and terminals. Defines the footprint required on the PCB and affects thermal and electrical characteristics.
Package Parasitics: Unwanted electrical effects (resistance, capacitance, inductance) inherent in component packages that can impact signal integrity and power delivery, especially at high frequencies.
Panel (Array): See Array.
Panelization: The process of arranging multiple PCBs onto a single manufacturing panel for efficient production. Includes considerations for panel size, orientation, fiducials, tooling holes, and break-away methods.
Parasitic Extraction: The process of calculating unintended electrical effects in a PCB layout, such as trace inductance or capacitance between conductors, for accurate simulation.
Paste Mask (Stencil Aperture Layer): The layer in PCB design data that defines the openings in a stencil, through which solder paste is applied to the pads for surface-mount components.
PCB (Printed Circuit Board): A rigid or flexible board made of insulating material with conductive pathways (traces) etched or printed onto it, used to mechanically support and electrically connect electronic components.
PCB Assembly (PCBA): A PCB with all its electronic components mounted and soldered. The process of component placement and soldering to create a functioning electronic assembly.
PCB Fab Drawing: Documentation provided to manufacturers with specifications for PCB fabrication, including dimensions, layer stack-up, drill sizes, and special requirements.
PCB Pooling: A shared manufacturing service where multiple designs are fabricated together to reduce costs by sharing panel space and setup charges.
PCB Prototype: A test version of a PCB produced before full production, used to verify design functionality, manufacturability, and performance.
PCB Warpage: Deformation of a PCB from a flat plane due to thermal or mechanical stress, potentially affecting component placement accuracy and reliability.
PCIe (PCI Express): A high-speed serial computer expansion bus standard, commonly used for add-in cards and high-bandwidth peripherals. Available in multiple "lane" configurations (x1, x4, x8, x16) with increasing bandwidth.
PDK (Process Design Kit): A set of files used to model a fabrication process for the design tools, ensuring designs meet the capabilities and constraints of a specific manufacturer.
PDN (Power Distribution Network): The network of traces, planes, and components that distribute power across a PCB. Critical for maintaining stable voltage levels and minimizing noise in the power supply.
Photoplotter: A device that uses a light source (e.g., laser) to create high-resolution photographic film (artwork) from Gerber data, used in PCB manufacturing to pattern the layers. Increasingly replaced by direct imaging systems.
PI (Power Integrity): The quality of the power delivery system in maintaining stable voltage levels under varying load conditions. Critical for reliable operation of digital circuitry, especially at high speeds.
Pick and Place Machine: An automated machine that picks electronic components from reels or trays and accurately places them onto their designated positions on a PCB during assembly.
Pin: A terminal on an electronic component or connector, providing electrical connection to a circuit.
Pitch: The center-to-center spacing between adjacent leads or pads on a component or PCB. Determines minimum clearance requirements and affects manufacturability.
Plane (Power Plane, Ground Plane): A continuous copper area on a PCB layer, typically dedicated to a power supply voltage (power plane) or ground (ground plane), providing low impedance and good shielding.
Plane Capacitance: The natural capacitance formed between power and ground planes in a PCB, which helps filter high-frequency noise and stabilize power supplies.
Plane Splitting: The technique of dividing a reference plane, often to separate analog and digital grounds or to accommodate multiple voltage domains.
Plated Slots: Elongated plated holes in a PCB, used for specialized connectors or component leads that aren't round.
Plated Through-Hole (PTH): A hole in a PCB that has been plated with copper on its inner walls, creating an electrical connection between layers. Used for through-hole component leads and vias.
Plating: The electrochemical or chemical deposition of a metal layer (e.g., copper, tin, gold) onto a surface, such as the walls of drilled holes or copper pads on a PCB.
PLCC (Plastic Leaded Chip Carrier): A surface-mount IC package with J-shaped leads on all four sides, designed for higher reliability than flat leads.
Polygon Pour: See Copper Pour.
Positive Etching: A PCB manufacturing process where copper is selectively preserved during etching, protected by photoresist in areas where conductors are desired.
Post-Layout Simulation: Simulation performed after PCB layout, using extracted parasitics for accuracy. Provides more realistic predictions of circuit behavior than pre-layout simulation.
Pour: A filled area of copper on a PCB, typically connected to power or ground. See Copper Pour.
Power Plane: A continuous copper layer dedicated to distributing power in a PCB, providing low impedance and reducing voltage drops.
Pre-Layout Simulation: Simulation performed before PCB layout to verify circuit functionality, using ideal or estimated parasitic values.
Prepreg: A layer of fiberglass cloth pre-impregnated with partially cured epoxy resin. Used in multilayer PCBs to bond core layers together and provide insulation between conductive layers.
Propagation Delay: The time it takes for a signal to travel from one point to another in a circuit. Affected by trace length, dielectric constant, and geometry.
Proximity Effect: The interaction between adjacent conductors carrying alternating current, affecting current distribution and effectively increasing resistance at high frequencies.
PTH (Plated Through Hole): A hole in a PCB with conductive plating connecting multiple copper layers. Used for component mounting and layer interconnection.
QFN (Quad Flat No-leads package): A surface-mount IC package with no leads, using pads on the bottom surface for connections. Offers better thermal performance and smaller footprint than leaded packages.
QFP (Quad Flat Package): A surface-mount IC package with leads extending from all four sides. Available in various lead counts and pitches, commonly used for microcontrollers and other integrated circuits.
Rat's Nest: In ECAD software, a visual representation of all the unrouted connections (nets) between component pads on a PCB layout, typically shown as straight lines. Helps visualize connection density and routing requirements.
RDL (Redistribution Layer): A layer used to redistribute connection points on an IC or package, enabling more complex routing or different connection technologies.
Reference Designator: A unique alphanumeric code (e.g., R1, C10, U3) assigned to each component on a schematic and PCB to identify it. Essential for assembly and troubleshooting.
Reference Plane: A plane layer (usually ground or power) used as a signal return path. Critical for controlled impedance and signal integrity in high-speed designs.
Reflow Soldering: A process for soldering surface-mount components where solder paste is first applied to the pads, components are placed, and then the entire assembly is heated in an oven until the solder melts and flows, creating solder joints.
Registration: The proper alignment of PCB layers relative to each other. Critical for reliable via connections and impedance control.
Resist (Photoresist, Solder Resist): A coating material used to protect selected areas of a PCB from etchant (photoresist) or solder (solder resist/mask) during manufacturing processes.
Resin Rich Area: A region with excess epoxy resin in the PCB laminate, potentially causing inconsistent electrical properties or reliability issues.
Resin Starved Area: A region with insufficient epoxy resin in the PCB laminate, potentially leading to delamination or other reliability problems.
Return Current: The current flowing back to the source, typically through a ground plane. Must be considered in high-speed designs to minimize loop area and associated inductance.
Return Loss: The reflection of signal power from a discontinuity in a transmission line, measured in decibels. Higher return loss indicates better impedance matching.
Return Path Discontinuity: A break in the signal return path, often causing signal integrity issues like increased emissions and crosstalk. Common at plane changes, slots, or splits.
Rigid-Flex PCB: A hybrid PCB construction consisting of rigid sections interconnected by flexible sections, allowing the board to be bent or folded to fit into tight spaces. Common in mobile devices and medical equipment.
Ringing: Unwanted oscillation in a signal due to impedance mismatches and reflections. Appears as damped sinusoidal variations after transitions and can cause false triggering.
Rise Time: The time it takes for a signal to transition from low to high, typically measured from 10% to 90% of the signal's amplitude. Critical for timing calculations in digital circuits.
RLGC Parameters: Resistance, Inductance, Conductance, and Capacitance parameters used in transmission line modeling. Used to characterize signal propagation in PCB traces.
Rogers Material: A high-frequency PCB substrate material with excellent electrical properties, manufactured by Rogers Corporation. Used for RF and microwave applications where low loss and consistent dielectric properties are critical. Examples include RO4350B (Dk=3.48, Df=0.0037 at 10 GHz) and RT/duroid 5880 (Dk=2.2, Df=0.0009 at 10 GHz).
RoHS (Restriction of Hazardous Substances): A European Union directive (2002/95/EC, updated as 2011/65/EU) that restricts the use of specific hazardous materials in electrical and electronic products, including lead, mercury, and certain flame retardants.
Route / Routing: The process of creating electrical connections between components using copper traces. Includes considerations for trace width, clearance, length matching, and signal integrity.
S-Parameters: Scattering parameters used for RF and high-speed digital circuit analysis. Describe how RF energy propagates through a multi-port network and are used to characterize components and transmission lines.
Schematic (Schematic Diagram): A diagram that represents an electronic circuit using standardized symbols for components and lines for their interconnections. It defines the electrical functionality without showing physical layout.
Schematic Capture: The process of creating a schematic diagram using ECAD software, including placing components, connecting them, and assigning properties.
Schematic Symbol: A graphical representation of an electronic component used in a schematic diagram, showing connection points (pins) and basic function but not physical dimensions.
Self-Heating: Temperature rise in a component or trace caused by power dissipation. Must be considered in high-power designs to prevent thermal damage or performance degradation.
Sequential Lamination: A multi-step lamination process used to create HDI PCBs with buried and blind vias. Allows for higher interconnect density than conventional PCB processes.
Serpentine: A winding trace pattern used for length matching in high-speed designs. Creates additional path length without taking up excessive board space.
Shock Testing: A mechanical testing method that evaluates how PCBs and electronic assemblies respond to sudden impacts or accelerations. Important for products used in automotive, aerospace, or other harsh environments.
Short Circuit (Short): An unintended low-resistance connection between two points in a circuit that are supposed to be at different potentials, often causing excessive current flow. A common defect in PCB manufacturing and assembly.
SI (Signal Integrity): The quality of an electrical signal as it travels through a transmission path. Concerns include reflections, crosstalk, jitter, and timing, particularly important in high-speed digital designs.
Signal Integrity Analysis: The process of analyzing and optimizing the quality of signals in a PCB, using simulation tools to identify and resolve issues before manufacturing.
Signal Layer: A layer in a PCB primarily used for routing electrical signals between components, as opposed to power or ground planes.
Signal Model: A mathematical representation of signal behavior in a circuit, used for simulation and analysis.
Silkscreen (Legend): A layer of ink (typically white or black) printed on the top and/or bottom surface of a PCB, used to display component reference designators, company logos, polarity markings, and other identifying information.
Simulation: The use of software (e.g., SPICE) to model and analyze the behavior of an electronic circuit before it is physically built, helping to verify its functionality and performance.
Single-Sided PCB: A PCB with conductive traces on only one side of the insulating substrate. The simplest and least expensive PCB type, but limited in complexity.
SiP (System-in-Package): An advanced packaging technology that combines multiple integrated circuits, usually bare dies, and passive components into a single module. Enables higher integration and smaller form factors than traditional packaging approaches.
SIW (Substrate Integrated Waveguide): A type of transmission line integrated into the PCB substrate, combining the benefits of planar circuits and non-planar waveguides for microwave and millimeter-wave applications.
Skew: Time difference between signals, especially important in parallel interfaces like memory buses where signals must arrive at the destination within a specific time window.
Skin Effect: Concentration of high-frequency current at the surface of a conductor, effectively increasing resistance as frequency rises. Requires wider traces or special geometries for high-frequency signals.
Slivers: Thin copper remnants that can create manufacturing defects, often caused by acute angles in copper features or insufficient spacing.
Slot: An elongated hole in a PCB, used for connectors, component mounting, or mechanical clearance.
SMD (Surface Mount Device): An electronic component designed to be mounted directly onto the surface of a PCB, rather than having leads that pass through holes. Enables higher density and often better electrical performance than through-hole technology.
SMT (Surface Mount Technology): The method of assembling electronic circuits by mounting SMDs directly onto the surface of a PCB. Dominates modern electronics due to size, cost, and performance advantages.
Soft Gold: Gold plating optimized for wire bonding applications, with high purity and specific mechanical properties to facilitate reliable bonds.
SOIC (Small Outline Integrated Circuit): A surface-mount IC package with leads extending from both long sides. A common package for medium-complexity ICs like operational amplifiers and simple logic devices.
Solder: A fusible metal alloy used to create permanent electrical and mechanical connections between component leads and PCB pads. Modern electronics predominantly use lead-free solder to comply with environmental regulations.
Solder Bridge: An unintended solder connection between two or more adjacent conductive elements (e.g., pads, leads) that should not be connected. Creates short circuits and is a common assembly defect.
Solder Dam: A feature preventing solder flow between pads or areas, typically implemented as solder mask between closely spaced pads.
Solder Mask (Solder Resist): A protective coating (typically green, blue, red, black, or white) applied to a PCB that covers all areas except those intended for soldering (pads, vias). It prevents solder bridges and protects copper from oxidation.
Solder Mask Defined Pad: A pad where the solder mask opening defines the solderable area rather than the copper. Used for fine-pitch components where precise solder volume control is critical.
Solder Paste: A mixture of tiny solder particles and flux, used in SMT assembly. It is applied to pads before component placement and then melted during reflow soldering.
Solder Side (Bottom Side): The side of a through-hole PCB where components are typically soldered (opposite the component side). For SMT, components can be on both sides.
Solder Void: A gas pocket or void in a solder joint that can weaken the connection. Often caused by outgassing during reflow or insufficient flux activity.
SPECCTRA: An auto-routing tool and file format originally developed by Cooper & Chyan Technology (later acquired by Cadence). Known for handling complex routing constraints and high-density designs.
SPICE (Simulation Program with Integrated Circuit Emphasis): A general-purpose, open-source analog electronic circuit simulator used to predict circuit behavior. Many ECAD tools integrate SPICE-based simulation.
Split Plane: A power or ground plane that is divided into sections, often to separate different voltage domains or analog/digital grounds.
Stacked Vias: Vias placed directly on top of each other to connect multiple layers. Allow for efficient vertical connections but can present manufacturing challenges and reliability concerns.
Staggered Vias: Vias that are offset from each other rather than stacked, providing more reliable layer-to-layer connections at the cost of additional space.
Star Grounding: A grounding technique where multiple ground connections radiate from a single point, minimizing common impedance coupling between circuits.
Statistical Timing Analysis: Probability-based analysis of signal timing in digital circuits, considering manufacturing variations and environmental factors to predict yield.
Stencil: A thin sheet of metal (usually stainless steel) or plastic with openings (apertures) corresponding to the SMT pads on a PCB. Used to accurately deposit solder paste onto the pads during assembly.
STEP File (Standard for the Exchange of Product model data): A common 3D CAD file format used to exchange 3D model data between different CAD systems. Often used for PCB and component 3D models to facilitate ECAD-MCAD integration.
Stripline: A transmission line design where the signal trace is embedded between two ground planes. Provides better shielding than microstrip but is more difficult to fabricate and modify.
Stub: An unused portion of a via that can cause signal reflections in high-speed designs. Often removed by backdrilling in high-performance systems.
Substrate: The insulating base material of a PCB (e.g., FR-4, polyimide). Determines mechanical, thermal, and electrical properties of the board.
Substrate Noise: Interference generated within the semiconductor substrate of integrated circuits, which can couple between different circuit sections and affect performance.
Surface Finish: The final coating applied to exposed copper on a PCB for protection and solderability. Common types include HASL, ENIG, immersion silver, immersion tin, and OSP.
Teardrop: A small, triangular or filleted addition of copper at the junction of a trace and a pad or via. It improves mechanical strength, reduces stress concentration, and helps prevent trace separation during drilling or thermal cycling.
Test Coupon: A small, representative section of a PCB panel, often including specific test structures, used for quality control testing (e.g., impedance measurement, layer registration, via reliability).
Test Point: A designated point (pad, via, or dedicated structure) on a PCB used for accessing signals with test probes during testing or debugging.
TDR (Time Domain Reflectometer): An instrument used to characterize transmission lines and locate faults by sending pulses through traces to measure impedance discontinuities. Critical for high-speed PCB validation.
Tg (Glass Transition Temperature): The temperature at which a PCB substrate material transitions from a rigid to a softened state. Higher Tg materials are required for lead-free soldering and high-temperature applications. Standard FR-4 has a Tg of around 130-140°C, while high-Tg FR-4 can reach 170-180°C.
Thermal Analysis: In ECAD-MCAD integration, the simulation of heat generation and dissipation in electronic components and PCBs, identifying potential hotspots and guiding cooling solutions.
Thermal Co-Simulation: The combined analysis of electrical and thermal effects in electronic systems, evaluating how heat generated by components affects both electrical performance and mechanical structures. Critical for high-power or densely packed designs.
Thermal Management: The process of controlling the temperature of electronic components to ensure they operate within safe limits. Includes techniques like heatsinks, thermal vias, and forced-air cooling.
Thermal Relief: A specialized pad connection to a large copper plane (power or ground). It uses short spokes of copper to connect the pad to the plane, allowing for easier soldering by limiting heat dissipation into the plane, while still maintaining good electrical connection.
Thermal Via: Vias used primarily for heat dissipation, connecting a heat-generating component or pad to a larger copper plane or heatsink on another layer or the opposite side of the board.
Thieving: Adding copper patterns to ensure uniform plating during manufacturing. These patterns are usually disconnected from circuits and distributed in areas with low copper density.
Through-Hole Technology (THT): A mounting scheme used for electronic components that involves the use of pins on the components that are inserted into holes drilled in the PCB and then soldered, typically from the opposite side.
Time of Flight: The time it takes for a signal to travel a specific distance. Depends on trace length and dielectric constant, crucial for timing calculations in high-speed designs.
Tombstoning: A defect where a component stands on one end during soldering, caused by uneven solder forces. Most common with small passive components like chip resistors and capacitors.
Tooling Hole: A hole in a PCB used for alignment during manufacturing, assembly, and testing processes. Not electrically functional.
Top Layer: The uppermost layer of a PCB, typically used for component placement and primary routing.
TQFP (Thin Quad Flat Package): A thin version of the Quad Flat Package (QFP) for surface-mount ICs. Features leads extending from all four sides and is common for microcontrollers and other integrated circuits.
Trace (Track): A conductive path on a PCB, usually made of copper, that electrically connects components. Width, thickness, and proximity to reference planes determine its electrical characteristics.
Trace Impedance Control: Managing trace dimensions and materials to achieve specific impedance values, critical for signal integrity in high-speed designs.
Trace Space: The distance between adjacent traces on a PCB. Minimum spacing is determined by manufacturing capabilities and electrical requirements like voltage isolation.
Trace Width: The width of a conductive path on a PCB, which determines its current-carrying capacity and impedance. Critical for both power delivery and signal integrity.
UL (Underwriters Laboratories): An independent safety science company that tests and certifies products for safety. PCBs often carry UL markings indicating compliance with flammability and electrical safety standards.
Underetch: Insufficient removal of copper during the etching process, resulting in traces that are wider than designed and potentially causing shorts.
Underfill: A specialized epoxy material applied beneath components (particularly BGAs and CSPs) to provide mechanical support, improve reliability, and protect solder joints from thermal and mechanical stress.
V-Score (V-Cut): A V-shaped groove cut partially through a PCB panel on both sides, along the lines where individual boards are to be separated after assembly. Enables clean, straight breaks without requiring routing.
VCC (Voltage Common Collector): A common notation for the positive power supply voltage in a circuit, often used interchangeably with VDD in modern designs despite the historical distinction.
VDD (Voltage Drain Drain): A common notation for the positive power supply voltage in a circuit, particularly in CMOS and other field-effect transistor designs.
Via (Vertical Interconnect Access): A plated hole in a PCB that electrically connects copper traces on different layers of the board. Types include through-hole, blind, and buried vias.
Via Fence: A row of vias used to reduce interference and improve isolation between circuits, typically by connecting to ground planes and creating a shield.
Via Stitching: A pattern of vias used to connect ground planes and reduce EMI by providing low-impedance paths between layers and minimizing current loop areas.
Via-in-Pad: A via placed directly within the surface mount pad of a component. This technique saves space but requires special manufacturing steps (e.g., filling and capping the via) to ensure a reliable solder joint by preventing solder wicking into the via.
Vibration Analysis: A simulation or testing method that evaluates how PCBs respond to mechanical vibrations at various frequencies. Important for electronics used in automotive, aerospace, industrial, or other high-vibration environments.
VNA (Vector Network Analyzer): An instrument used to analyze the performance of RF circuits and transmission lines by measuring S-parameters across a range of frequencies.
Wave Soldering: An automated soldering process primarily used for through-hole components and some bottom-side SMT components. The PCB passes over a wave of molten solder, which solders the component leads to the pads.
WEEE (Waste Electrical and Electronic Equipment): EU directive (2002/96/EC, updated as 2012/19/EU) regulating the disposal and recycling of electronic equipment, placing responsibility on manufacturers to handle end-of-life management.
White Residue: Flux residue left on a PCB after soldering, which can be benign or potentially corrosive depending on the flux type and environment.
Wire Bonding: A method of making interconnections between an integrated circuit and a PCB using very fine wire, commonly used in chip-on-board assemblies and integrated circuit packaging.
X-Out: A defective PCB on a manufacturing panel that is marked (e.g., with an "X") and typically discarded or not assembled, allowing the rest of the panel to be utilized.
X-Ray Inspection: A non-destructive inspection method using X-rays to examine solder joints, especially for components with hidden connections like BGAs, or to check internal layer registration.
Yield: The percentage of acceptable (non-defective) products produced in a manufacturing process. For PCBs, this can refer to fabrication yield or assembly yield, with costs typically reflecting expected yield rates.
Z-Axis Expansion: Vertical expansion of PCB materials during heating, important for reliability of plated through-holes. Excessive expansion can cause barrel cracking in PTHs.
This glossary provides a comprehensive reference for terminology used in the ECAD and PCB industry. Clear understanding of these terms is essential for effective communication among design engineers, PCB fabricators, component manufacturers, assembly technicians, and end-users in the electronics industry.